HYS72T128001HR Datasheet, PDF (15/40 Pages) Qimonda AG – 240-Pin Registered DDR SDRAM Modules

Internet Data Sheet
HYS72T[128/256]00xHR–[3S/3.7/5]–A
Registered DDR2 SDRAM Modules
3.2
DC Operating Conditions
Parameter
Symbol Values
TABLE 9
Operating Conditions
Unit Note
Min.
Max.
DIMM Module Operating Temperature Range (ambient)
T_OPR
0
+55
°C
1)
DRAM Component Case Temperature Range
T_CASE
0
+95
°C
2)3)4)5)
Storage Temperature
T_STG
–55
+100
°C
Barometric Pressure (operating & storage)
P_Bar
+69
+105
kPa ⁶⁾
Operating Humidity (relative)
H_OPR
10
90
%
1) When operating this product in the 85 °C to 95 °C T_CASE temperature range, the High Temperature Self Refresh has to be enabled by
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of I_DD6 by approximately 50 %
2) DRAM Component Case Temperature is the surface temperature in the center on the top side of any of the DRAMs.
3) Within the DRAM Component Case Temperature range all DRAM specification will be supported.
4) Above 85 °C DRAM case temperature the Auto-Refresh command interval has to be reduced to t_REFI = 3.9 µs.
5) Self-Refresh period is hard-coded in the DRAMs and therefore it is imperative that the system ensures the DRAM is below 85 °C case
temperature before initiating self-refresh operation.
6) Up to 3000 m
Parameter
Symbol
Values
TABLE 10
Supply Voltage Levels and DC Operating Conditions
Unit Note
Min.
Typ.
Max.
Device Supply Voltage
V_DD
1.7
1.8
1.9
V
Output Supply Voltage
V_DDQ
1.7
1.8
1.9
V
1)
Input Reference Voltage
V_REF
0.49 × V_DDQ
0.5 × V_DDQ
0.51 × V_DDQ
V
2)
SPD Supply Voltage
V_DDSPD
1.7
—
3.6
V
DC Input Logic High
V_IH(DC)
V_REF + 0.125 —
V_DDQ + 0.3
V
DC Input Logic Low
V_{IL (DC})
– 0.30
—
V_REF – 0.125
V
In / Output Leakage Current
I_L
–5
—
5
µA
3)
1) Under all conditions, V_DDQ must be less than or equal to V_DD
2) Peak to peak AC noise on V_REF may not exceed ± 2% V_REF (DC).V_REF is also expected to track noise in V_DDQ.
3) Input voltage for any connector pin under test of 0 V ≤ V_IN ≤ V_DDQ + 0.3 V; all other pins at 0 V. Current is per pin
Rev. 1.4, 2007-02
15
03062006-GD6J-14FP