HYS72T256322HP Datasheet, PDF (29/36 Pages) Qimonda AG – 240-Pin Dual-Die Registered DDR2 SDRAM Modules

Internet Data Sheet
HYS72T256322HP–[3S/3.7]–A
Registered DDR2 SDRAM Modules
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
Description
Component Attributes
t_CK @ CL_MAX -1 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -1 [ns]
t_CK @ CL_MAX -2 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -2 [ns]
t_RP.MIN [ns]
t_RRD.MIN [ns]
t_RCD.MIN [ns]
t_RAS.MIN [ns]
Module Density per Rank
t_AS.MIN and t_CS.MIN [ns]
t_AH.MIN and t_CH.MIN [ns]
t_DS.MIN [ns]
t_DH.MIN [ns]
t_WR.MIN [ns]
t_WTR.MIN [ns]
t_RTP.MIN [ns]
Analysis Characteristics
t_RC and t_RFC Extension
t_RC.MIN [ns]
t_RFC.MIN [ns]
t_CK.MAX [ns]
t_DQSQ.MAX [ns]
t_QHS.MAX [ns]
PLL Relock Time
T_CASE.MAX Delta / ∆T_4R4W Delta
Psi(T-A) DRAM
∆T₀ (DT0)
∆T_2N (DT2N, UDIMM) or ∆T_2Q (DT2Q, RDIMM)
∆T_2P (DT2P)
∆T_3N (DT3N)
∆T_3P.fast (DT3P fast)
∆T_3P.slow (DT3P slow)
HYS72T256322HP–3.7–A HYS72T256322HP–3S–A
2 GByte
2 GByte
×72
×72
2 Ranks (×4)
2 Ranks (×4)
PC2–4200P–444
PC2–5300P–555
Rev. 1.2
Rev. 1.2
HEX
03
3D
50
50
60
3C
1E
3C
2D
01
25
37
10
22
3C
1E
1E
00
00
3C
69
80
1E
28
0F
51
78
3F
22
1E
1E
24
17
HEX
03
3D
50
50
60
3C
1E
3C
2D
01
20
27
10
17
3C
1E
1E
00
00
3C
69
80
18
22
0F
53
78
4B
2E
26
26
2B
1B
Rev. 1.01, 2006-09
30
03062006-PK3L-ZYSE