HYS72T256322HP Datasheet, PDF (24/36 Pages) Qimonda AG – 240-Pin Dual-Die Registered DDR2 SDRAM Modules

Internet Data Sheet
HYS72T256322HP–[3S/3.7]–A
Registered DDR2 SDRAM Modules
Symbol
TABLE 17
ODT AC Characteristics and Operating Conditions for DDR2-533 &DDR2-400
Parameter / Condition
Values
Unit
Note
Min.
Max.
t_AOND
t_AON
ODT turn-on delay
ODT turn-on
2
t_AC.MIN
2
t_AC.MAX + 1 ns
t_CK
ns
1)
t_AONPD
ODT turn-on (Power-Down Modes)
t_AC.MIN + 2 ns 2 t_{CK +} t_AC.MAX + 1 ns
ns
t_AOFD
t_AOF
ODT turn-off delay
ODT turn-off
2.5
t_AC.MIN
2.5
t_AC.MAX + 0.6 ns
t_CK
ns
2)
t_AOFPD
ODT turn-off (Power-Down Modes)
t_AC.MIN + 2 ns 2.5 t_{CK +} t_AC.MAX + 1 ns ns
t_ANPD
ODT to Power Down Mode Entry Latency
3
—
t_CK
t_AXPD
ODT Power Down Exit Latency
8
—
t_CK
1) ODT turn on time min. is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when
the ODT resistance is fully on. Both are measure from t_AOND.
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Both are measured from t_AOFD.
Rev. 1.01, 2006-09
25
03062006-PK3L-ZYSE