HYS72T64400HFA Datasheet, PDF (25/47 Pages) Qimonda AG – 240-Pin Fully-Buffered DDR2 SDRAM Modules

Internet Data Sheet
HYS72T[64/128/256]4[00/20]HFA–[2.5/3S/3.7]–B
Fully-Buffered DDR2 SDRAM Modules
6
SPD Codes
This chapter lists all hexadecimal byte values stored in the EEPROM of the products described in this data sheet. SPD stands
for serial presence detect. All values with XX in the table are module specific bytes which are defined during production.
List of SPD Code Tables
• Table 16 “PC2–6400–666” on Page 25
• Table 17 “PC2–6400–666” on Page 30
• Table 18 “PC2–6400–666” on Page 35
Product Type
TABLE 16
PC2–6400–666
Organization
Label Code
JEDEC SPD Revision
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
Description
SPD Size CRC / Total / Used
SPD Revision
Key Byte / DRAM Device Type
Voltage Level of this Assembly
SDRAM Addressing
Module Physical Attributes
Module Type
Module Organization
Fine Timebase (FTB) Dividend and Divisor
Medium Timebase (MTB) Dividend
Medium Timebase (MTB) Divisor
t_CK.MIN (min. SDRAM Cycle Time)
t_CK.MAX (max. SDRAM Cycle Time)
Rev.1.01, 2007-06-20
10062006-RQWY-GI6S
512MB
1 GByte
2 GByte
×72
×72
×72
1 Rank (×8)
2 Ranks (×8)
2 Ranks (×4)
PC2–6400F–666 PC2–6400F–666 PC2–6400F–666
Rev. 1.1
Rev. 1.1
Rev. 1.1
HEX
92
11
09
12
44
23
07
09
00
01
04
0A
20
HEX
92
11
09
12
44
23
07
11
00
01
04
0A
20
HEX
92
11
09
12
48
23
07
10
00
01
04
0A
20
25