HYB25D512400C Datasheet, PDF (24/37 Pages) Qimonda AG – DDR SDRAM

Internet Data Sheet
HYB25D512[400/160/800]C[E/T/F/C](L)
512-Mbit Double-Data-Rate SDRAM
Parameter
Symbol
Min.
Values
Unit
Typ. Max.
Note/
Test Condition
Input/Output Capacitance: DQ, DQS, DM C_IO
3.5
—
4.0
—
4.5
pF
5.0
pF
TFBGA ¹⁾²⁾
TSOPII ¹⁾²⁾
Delta Input/Output Capacitance: DQ, DQS, C_dIO
DM
—
—
0.5
pF
1)
1) These values are guaranteed by design and are tested on a sample base only. V_DDQ = V_DD = 2.5 V ± 0.2 V, f = 100 MHz, T_A = 25 °C,
V_OUT(DC) = V_DDQ/2, V_OUT (Peak to Peak) 0.2 V. Unused pins are tied to ground.
2) DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching at the
board level.
Rev. 1.31, 2006-09
24
03292006-3TFJ-HNV3