HYB25D512400C Datasheet, PDF (17/37 Pages) Qimonda AG – DDR SDRAM

Internet Data Sheet
HYB25D512[400/160/800]C[E/T/F/C](L)
512-Mbit Double-Data-Rate SDRAM
%$ %$ $ $ $


UH JD GGU
$ $ $ $
2SH UDWLQ J02 ' (
Z
$ $ $ $ $ $
 '6  '/ /
Z Z Z
03%7 
Field
Bits
DLL
0
Type¹⁾
w
DS
1
MODE
[12:3]
1) w = write only register bit
TABLE 9
Extended Mode Register
Description
DLL Status
0_B Enabled
1_B Disabled
Drive Strength
0_B Normal
1_B Weak
Operating Mode
Note:
5. A2 must be 0 to provide compatibility with early DDR devices
6. All other bit combinations are RESERVED.
00000000000_BNormal Operation
Rev. 1.31, 2006-09
17
03292006-3TFJ-HNV3