HYS72T512422HFN Datasheet, PDF (13/41 Pages) Qimonda AG – 240-Pin Fully-Buffered DDR2 SDRAM Modules

Internet Data Sheet
HYS72T512[4/5]22HFN–[3S/3.7]–A
240-Pin Fully-Buffered DDR2 SDRAM Modules
3.2
Interfaces
Figure 2 illustrates the Advanced Memory Buffer and all of its
interfaces. They consist of two FB-DIMM links, one DDR2
channel and an SMBus interface. Each FB-DIMM link
connects the Advanced Memory Buffer to a host memory
controller or an adjacent FB-DIMM. The DDR2 channel
supports direct connection to the DDR2 SDRAMs on a Fully
Buffered DIMM.
FIGURE 2
Block Diagram Advanced Memory Buffer Interface
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Interface Topology
The FB-DIMM channel uses a daisy-chain topology to provide
expansion from a single DIMM per channel to up to 8 DIMMs
per channel. The host sends data on the southbound link to
the first DIMM where it is received and redriven to the second
DIMM. On the southbound data path each DIMM receives the
data and again re-drives the data to the next DIMM until the
last DIMM receives the data. The last DIMM in the chain
initiates the transmission of data in the direction of the host
(a.k.a. northbound). On the northbound data path each DIMM
receives the data and re-drives the data to the next DIMM
until the host is reached.
Rev. 1.3, 2006-12
13
03292006-QQ89-IKE4