HYS72T512420EFA Datasheet, PDF (10/37 Pages) Qimonda AG – 240-Pin Fully-Buffered DDR2 SDRAM Modules DDR2 SDRAM RoHS Compliant Products

Internet Data Sheet
HYS72T512420EFA–[25F/3S]–C
Fully-Buffered DDR2 SDRAM Modules
Pin#
Nam Pin
e
Type
19,20,44,45, RFU NC
86,87,105,1
06,139,
140,164,165
,206,207,22
5,226
136
VID0 –
16
VID1 –
Buffer
Type
–
–
–
137
Test AI
–
Function
Not connected
Pins not connected on Infineon FB-DIMM’s. Pin positions are reserved for
future architecture flexibility.
Voltage ID
Note: These Pins must be unconnected for DDR2-based Fully Buffered
DIMMs VID[0] is V_DD value: OPEN = 1.8 V, GND = 1.5 V; VID[1] is
V_CC value: OPEN = 1.5 V, GND = 1.2 V
VREF
Note: Pin must be unconnected for normal operation
Abbreviation
HSDL_15
LV-CMOS
CMOS
OD
TABLE 6
Abbreviations for Buffer Type
Description
High-Speed Differential Point-to-Point Link Interface at 1.5 V
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and allows multiple
devices to share as a wire-OR.
Abbreviation
I
O
I/O
AI
PWR
GND
NU
NC
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Usable
Not Connected
TABLE 7
Abbreviations for Pin Type
Rev.1.20, 2007-10-19
10
03202007-06NE-DYYI