PE9763 Datasheet, PDF (8/15 Pages) Peregrine Semiconductor Corp. – 3.2 GHz Delta-Sigma modulated Fractional-N Frequency Synthesizer for Low Phase Noise Applications

Functional Description
The PE9763 consists of counters, a prescaler, an
18-bit delta-sigma modulator (DSM), a phase
detector and a charge pump. The dual modulus
prescaler divides the VCO frequency by either 10
or 11, depending on the value of the modulus
select. Counters “R” and “M” divide the reference
and prescaler output, respectively, by integer
values stored in a 20-bit register. An additional
counter (“A”) is used in the modulus select logic.
Figure 3. Functional Block Diagram
PE9763
Product Specification
The DSM modulates the “A” counter outputs in
order to achieve the desired fractional step.
The phase-frequency detector generates up and
down frequency control signals. These signals can
be configured to drive a tri-state charge pump.
Data is written into the internal registers via the
three wire serial bus. There are also various
operational and test modes and a lock detect
output
f_r
R Counter
f_c
(6-bit)
R(5:0)
Sdata
Control
Pins
Control
Logic
M(8:0)
K(17:0)
A(3:0)
Modulus
Select
F_in
10/11
F_in
Prescaler
DSM
+
Logic
Phase
Detector
M Counter
(9-bit)
f_p
Icp
Charge
Pump
PD_U
PD_D
2 kΩ
LD
Cext
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
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Document No. 70-0140-02 │ UltraCMOS™ RFIC Solutions