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PE33241 Datasheet, PDF (7/13 Pages) Peregrine Semiconductor – UltraCMOS Integer-N PLL Frequency Synthesizer for Low Phase Noise Applications
PE33241
Preliminary Specification
Functional Description
The PE33241 consists of a prescaler, counters, a
phase detector, and control logic. The dual
modulus prescaler divides the VCO frequency by
either 5/6 or 10/11, depending on the value of the
modulus select. Counters “R” and “M” divide the
reference and prescaler output, respectively, by
integer values stored in a 21-bit register. An
additional counter (“A”) is used in the modulus
select logic. The phase-frequency detector
generates up and down frequency control signals.
The control logic includes a selectable chip
interface. Data can be written via serial bus or
hardwired directly to the pins. There are also
various operational and test modes and a lock
detect output.
Figure 4. Functional Block Diagram
VDD
Fin
Fin
Pre_5/6_Sel
SCLK
SDATA
S_WR
M(8:0)
A(3:0)
R(5:0)
Pre_En
Direct
FR
ENH
Input Buffer
Prescaler
5/6 or 10/11
Prescaler
Enable Select
MSEL
Primary
21-bit
Latch
Secondary
20-bit
Latch
Serial Mode
20
Direct Mode
20
Input Buffer
SCLK
Enh
SDATA
Register
8
E_WR
8-bit
Main
Counter
13
66
R Counter
8
GND
fp
Phase
fc
Detector
MSEL
fp
fc
PD_U
PD_D
LD
Cext
Dout
Document No. DOC-15014-3 │ www.psemi.com
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