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PE33241 Datasheet, PDF (5/13 Pages) Peregrine Semiconductor – UltraCMOS Integer-N PLL Frequency Synthesizer for Low Phase Noise Applications
PE33241
Preliminary Specification
Table 6. AC Characteristics: VDD = 2.65 to 2.95V, -40°C < TA < 85°C, unless otherwise specified
Symbol
Parameter
Condition
Min
Typical
Max
Control interface and latches (see Figures 4, 5, 6)
fClk
Serial data clock frequency1
tClkH
Serial clock HIGH time
tClkL
Serial clock LOW time
Sdata set-up time after Sclk rising edge, D[7:0]
tDSU
set-up time to M1_WR, M2_WR, A_WR, E_WR
rising edge
tDHLD
Sdata hold time after Sclk rising edge, D[7:0] hold
time to M1_WR, M2_WR, A_WR, E_WR
rising edge
tPW
S_WR, M1_WR, M2_WR, A_WR, E_WR
pulse width
10
30
30
10
10
30
Sclk rising edge to S_WR rising edge.
tCWR
S_WR, M1_WR, M2_WR, A_WR falling
30
edge to Hop_WR rising edge
tCE
Sclk falling edge to E_WR transition
30
S_WR falling edge to Sclk rising edge.
tWRC
Hop_WR falling edge to S_WR, M1_WR, M2_WR,
30
A_WR rising edge
tEC
E_WR transition to Sclk rising edge
tMDO
MSEL data out delay after Fin rising edge
Main divider 10/11 (including prescaler)4
PFin
Input level range
Main divider 5/6 (including prescaler)4
PFin
Input level range
Main divider (prescaler bypassed)4
Fin
PFin
Reference divider
Operating frequency2
Input level range
fr
Operating frequency3
Pfr
Reference input power2
Phase detector
fc
Comparison frequency3
30
CL = 12 pF
External AC coupling
800 MHz ≤ Freq < 1200 MHz
0
1200 MHz ≤ Freq ≤ 5 GHz
-35
External AC coupling
800 MHz ≤ Freq < 1200 MHz
0
1200 MHz ≤ Freq ≤ 4 GHz
-35
50
External AC coupling
-55
Single-ended input
-56
8
5
5
5
5
800
5
100
7
100
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
dBm
dBm
dBm
dBm
MHz
dBm
MHz
dBm
MHz
Document No. DOC-15014-3 │ www.psemi.com
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