PS219B2-AS Datasheet, PDF (8/11 Pages) Powerex Power Semiconductors – Dual-In-Line Intelligent Power Module 5 Amperes/600 Volts

Powerex, Inc., 173 Pavilion Lane, Youngwood, Pennsylvania 15697-1800 [phone] www.pwrx.com
PS219B2-S, PS219B2-AS, PS219B2-CS
Intellimod™ Module
Dual-In-Line Intelligent Power Module
5 Amperes/600 Volts
Application Circuit
C1 D1 C2
+
VUFB(2)
VVFB(3)
+
VWFB(4)
+
UP(5)
VP(6)
WP(7)
IGBT1
Di1
HVIC
IGBT2
Di2
IGBT3
Di3
P(24)
U(23)
V(22)
W(21)
Bootstrap negative
electrodes should be
connected to U, V, W
terminals directly and
separated from the
main output wires.
M
VP1(8)
C2
VNC(9)
C3
+
5V
5kΩ
15V
VD ₊
C1
D1 C2
UN(10)
VN(11)
WN(12)
FO(14)
VOT(17)
VN1(13)
VNC(16)
Long GND wiring here might
generate noise to input signal and
cause IGBT to malfunction.
IGBT4
Di4
LVIC
IGBT5
Di5
IGBT6
Di6
C1N(15)
B
C4
R1
Long wiring here might
cause SC level fluctuation
and malfunction.
NU(20)
NV(19)
NW(18)
Long wiring here
C ^{might cause short}
circuit failure.
D
SHUNT
A
RESISTOR
CONTROL
GND WIRING
N1
POWER
GND WIRING
Notes:
1) It is recommended to connect Control GND wiring and Power GND wiring only at point N1 (near terminal of shunt resistor) to prevent a malfunction by Power GND fluctuations.
2) It is recommended to insert a Zener diode D1 (24V/1W) between each pair of control supply terminals to prevent surge destruction.
3) To prevent surge destruction, the wiring between the DC bus smoothing capacitor and the P, N1 terminals should be as short as possible. Generally a 0.1-0.22µF snubber
capacitor C3 between the P-N1 terminals is recommended.
4) Time constant of R1, C4 for SC protection circuit should be selected so that protection works within 2µs. (Recommended value: ≤2µs) SC interrupting time might vary with the
wiring pattern. Tight tolerance, temp-compensated type, is recommended for R1, C4.
5) To prevent malfunction, the wiring of A, B, C should be as short as possible.
6) The point D at which the wiring to CIN filter is divided should be near the terminal of shunt resistor. NU, NV, NW terminals should be connected at near NU, NV, NW terminals.
7) All capacitors should be mounted as close to the terminals as possible. (C1: good temperature, frequency characteristic electrolytic type and C2: 0.22µ-2µF, good temperature,
frequency and DC bias characteristic ceramic types recommended.)
8) Input drive is active-high type. There is a 3.3kΩ (Min.) pull-down resistor in the input circuit of IC. To prevent malfunction, the wiring of each input should be as short as possible.
When using RC coupling circuit, make sure the input signal level meets the turn-on and turn-off threshold voltage.
9) FO output is open drain type. It should be pulled up to MCU or control power supple (e.g. 5V) by resistor makes IFO up to 1mA.
10) Direct coupling to the MCU without any opto-coupler or transformer isolation is possible because the HVIC is inside the module.
11) Two VNC terminals (9 & 16 pin) are connected inside the DIPIPM. Be sure to connect either one to the 15V power supply GND outside and leave the other one open.
12) IC malfunction can occur and cause the DIPIPM to operate erroneously when high frequency noise is superimposed on the control supply line. To avoid such problem, the line
ripple voltage should meet dV/dt ≤ ±1V/μs and Vripple ≤ 2Vp-p.
8
12/11 Rev. 0