PM8610 Datasheet, PDF (293/338 Pages) PMC-Sierra, Inc – SBI Bus Serializer / STS-12 Time Slot Interchange

SBS Telecom Standard Product Data Sheet
Preliminary
Figure 17 “C1” Synchronization Control
t_0,t₁
(no delay t delay through
Ingress SBI device)
t₂ t₃
t at 0µs
delay
125µ s
t₄
delay
125µ s
t₀
Ingress SBI
delay
delay
t₁
Ingress SBS
t₂
device
(1 frame delay)
NSE
delay
delay
t₃
Egress SBS
t₄
(1 frame delay)
Egress SBI
device
125µs Source
13.2 Synchronized Control Setting Changes
The NSE-20G and SBS support dual switch control settings. These dual settings permit one
bank of settings to be operational while the other bank is updated as a result of some new
connection requests. The CMP input selects the current operational switch control settings. CMP
is sampled by the NSE-20G on the base timing pulse t. The internal blocks sample the registered
CMP value as they receive the next C1 character –at least a delay of RC1DLY. The new CMP
value is applied on the first A1 character of the following STS-12 frame. This switchover is
hitless; the control change does not disrupt the user data flow in any way. This feature is required
for the addition of arbitrary new connections, as existing connections may need to be rerouted
(see the discussion of the connection routing algorithm in this document).
The DS0-granularity switch settings RAM in organized into two control settings banks, these are
switched by the above mechanisms on C1 boundaries. The NSE also has to coordinate the
switching of the connected SBS devices (if using the In-Band link facility), so a broader
understanding of the issues is required.
To illustrate the system, Sections 13.2.1 to 13.2.3 describe actual examples.
13.2.1 SBS/NSE Systems with DS0 and CAS switching
When building a DS0 and Channel Associated Signaling switching system with the SBS, SBS-lite
and NSE devices the overall timing is based on the CAS signaling multiframe on the SBI bus. In
this configuration the delay through the SBS devices is a single 125 µS SBI frame plus a few
77.76 MHz clocks and the delay through the NSE is a few 77.76 MHz clocks. A single C1FP
frame synchronization signal is distributed around the system. Internal to the SBS and NSE
devices are programmable offsets used to account for propagation delays through the system. The
key constraint is that all SBI frames are aligned going into the NSE device.
Compatible devices are PM8316 TEMUX-84, PM7388 FREEDM-336, PM7389 FREEDM-336-
84, PM7341 S/UNI-IMA-84, and other future SBI336 devices.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
293
Document ID: PMC-2000168, Issue 3