PM4351-1 Datasheet, PDF (185/485 Pages) PMC-Sierra, Inc – COMBINED E1/T1 TRANSCEIVER/FRAMER

STANDARD PRODUCT
DATA SHEET
PMC-1970624
ISSUE 10
PM4351 COMET
COMBINED E1/T1 TRANSCEIVER
Register 042H: BTIF Parity Configuration and Status
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R
R
R/W
Function
TPTYP
TPTYE
TDI
TSIGI
PTY_EXTD
Unused
Unused
Unused
Default
0
0
X
X
0
X
X
X
This register provides control and status reporting of data integrity checking on
the transmit backplane interface. A single parity bit in the F-bit position
represents parity over the previous frame (including the undefined bit positions).
Parity checking and generation is not supported when the NxDS0 mode is active.
Parity checking and generation is not supported when mapping a 1.544 Mbit/s
signal onto a higher rate backplane in the format where the first 24 time slots are
used, i.e., the RATE[1:0] bits in the BTIF Configuration register are not set to “00”
and the MAP bit in the BTIF Frame Pulse Configuration register is logic 1.
TPTYP:
The transmit parity type (TPTYP) bit sets even or odd parity in the transmit
streams. If TPTYP is a logic 0, the expected parity value in the F-bit position
of BTPCM and BTSIG is even, thus it is a one if the number of ones in the
previous frame is odd. If TPTYP is a logic 1, the expected parity value in the
F-bit position if BTPCM and BTSIG is odd, thus it is a one if the number of
ones in the previous frame is even.
TPTYE:
The transmit parity enable (TPTYE) bit enables transmit parity interrupts.
When TPTYE is a logic 1, parity errors on the inputs BTPCM and BTSIG are
indicated by the TDI and TSIGI bits, respectively, and by the assertion low of
the INTB output. When TPTYE is a logic 0, parity errors are indicated by the
TDI and TSIGI bits but are not indicated on the INTB output.
TDI:
The transmit data interrupt (TDI) bit indicates if a parity error has been
detected on the BTPCM input. This bit is cleared when this register is read.
PROPRIETARY AND CONFIDENTIAL
161