TDA8357J Datasheet, PDF (9/16 Pages) NXP Semiconductors – Full bridge vertical deflection output circuit in LVDMOS

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VI(bias)
0
Vi(p-p)
RGRD
12 kΩ
GUARD
8
GUARD
CIRCUIT
DEFLECTION
CONTROLLER
C6
2.2 nF
INA 1
RCV1
2.2 kΩ
(1%)
INPUT
AND
FEEDBACK
CIRCUIT
C7
2.2 nF
INB 2
RCV2
2.2 kΩ
(1%)
Vi(p-p)
VI(bias)
0
VP
3
M2
D1
M4
M1
M3
RFB
VP = 11 V
10 Ω
Vfb = 29 V
VFB
C3
C1
C4
C2
6
100
47 µF 100 nF
220 µF
nF
(100 V)
(25 V)
M5
D2
D3
D5
12 V
RCMP
270 kΩ
D4⁽²⁾
7 ^OUTA
9 FEEDB
RS
2.7 kΩ
RD1
330 Ω
deflection
coil
8.82 mH
7.9 Ω
(W66ESF)
RM
1.5 Ω
CD⁽¹⁾
47 nF
RD2⁽¹⁾
22 Ω
4 OUTB
TDA8357J
5
GND
MGS807
f_vert = 50 Hz; t_FB = 640 µs; I_I(bias) = 400 µA; I_i(dif)(peak) = 494 µA; I_o(p-p) = 1.45 A.
(1) Optional, depending on the deflection coil impedance.
(2) Optional extended flash over protection; BYD33D or equivalent.
Fig.4 Application diagram.