TDA4886A Datasheet, PDF (9/52 Pages) NXP Semiconductors – 140 MHz video controller with I2C-bus

Philips Semiconductors
140 MHz video controller with I²C-bus
Product specification
TDA4886A
7.9 I²C-bus control
The TDA4886A contains an I²C-bus receiver for several
control functions:
1. Contrast control with 6-bit DAC
2. Brightness control with 6-bit DAC
3. OSD contrast control with 4-bit DAC
4. Gain control for each channel with 6-bit DAC
5. Internal feedback reference and external reference
voltage control for each channel with 8-bit DAC
6. Control register with control bits BLH2, BLH1, FPOL,
DISV, DISO and PEDST.
After power-up and after internal power-on reset of the
I²C-bus the registers are set to the following values:
• Control bit FPOL to logic 1
• Control bits BLH2, BLH1, DISV, DISO and PEDST to
logic 0
• All other alignment registers to logic 0 (minimum value
for control registers).
2. Direct mode
Adjustments via the I²C-bus take effect immediately.
a) Most significant bit (MSB) of subaddresses is set to
logic 0.
b) Number of I²C-bus transmissions in direct mode is
unlimited.
c) Adjustments take effect directly at the end of each
I²C-bus transmission.
d) Direct mode can be used for all adjustments but
large changes of control values may appear as
visual disturbances in the picture on the monitor.
e) Auto-increment is possible.
f) Vertical blanking pulse is not necessary.
7.10 I²C-bus data buffer
1. Buffered mode
Adjustments via the I²C-bus are synchronized with
vertical blanking pulse at CLI.
a) Most significant bit (MSB) of subaddresses is set to
logic 1.
b) Only one I²C-bus transmission in buffered mode is
accepted before the start of the vertical blanking
pulse. Following transmission trials will get no
acknowledge.
c) Received data is stored in one internal 8-bit buffer.
d) Adjustments will take effect with detection of the
first vertical blanking pulse after the end of
according I²C-bus transmission.
e) Waiting for vertical blanking pulse in buffered mode
can be interrupted by power-on reset.
f) Auto-increment is impossible.
g) Buffered mode should be used for user
adjustments such as contrast, OSD contrast and
brightness while picture on monitor is visible.
1998 Dec 04
9