TDA4886A Datasheet, PDF (27/52 Pages) NXP Semiconductors – 140 MHz video controller with I2C-bus

Philips Semiconductors
140 MHz video controller with I²C-bus
Product specification
TDA4886A
11 I²C-BUS PROTOCOL
Table 1 Slave address
A6⁽¹⁾
A5⁽¹⁾
1
0
A4⁽¹⁾
0
A3⁽¹⁾
0
A2⁽¹⁾
1
A1⁽¹⁾
0
A0⁽¹⁾
0
W⁽²⁾
0
Notes
1. Address bit.
2. Write bit.
Table 2 Slave receiver format
S⁽¹⁾
SLAVE ADDRESS A⁽²⁾
SUBADDRESS A⁽³⁾
DATA BYTE A⁽⁴⁾
P⁽⁵⁾
Notes
1. START condition.
2. A = acknowledge.
3. All subaddresses within the range 00H to 09H are automatically incremented. The subaddress counter wraps around
from 09H to 00H. For subaddresses within the range 80H to 8FH no auto-increment takes place. Subaddresses
outside the ranges 00H to 0FH and 80H to 8FH are acknowledged by the device but neither auto-increment nor any
other internal operation takes place.
4. Single data byte in case of no auto-increment of subaddresses. More than one data byte with auto-increment of
subaddresses.
5. STOP condition.
1998 Dec 04
27