PSMN3R4-30BLE_15 Datasheet, PDF (9/13 Pages) NXP Semiconductors – N-channel 30 V 3.4 mΩ logic level MOSFET in D2PAK

NXP Semiconductors
V_DS
I_D
V_GS(pl)
V_GS(th)
V_GS
Q_GS1 Q_GS2
Q_GS
Q_GD
Q_G(tot)
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Fig. 14. Gate charge waveform definitions
PSMN3R4-30BLE
N-channel 30 V 3.4 mΩ logic level MOSFET in D2PAK
10
V_GS
(V)
8
6
4
2
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24 V
V_DS= 15 V
6V
0
0
20
40
60
80
100
Q_G (nC)
Fig. 15. Gate-source voltage as a function of gate
charge; typical values
10⁴
C
(pF)
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C_iss
100
I_S
(A)
80
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60
10³
C_oss
40
C_rss
T_j = 150°C
20
T_j = 25 °C
10²
10^-1
1
10
10²
V_DS(V)
0
0
0.3
0.6
0.9
1.2
V_SD (V)
Fig. 16. Input, output and reverse transfer capacitances _{Fig. 17. Source current as a function of source-drain}
as a function of drain-source voltage; typical
voltage; typical values
values
PSMN3R4-30BLE
Product data sheet
All information provided in this document is subject to legal disclaimers.
12 October 2012
© NXP B.V. 2012. All rights reserved
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