PHN405 Datasheet, PDF (9/12 Pages) NXP Semiconductors – 4 N-channel 60 mohm FET array enhancement mode MOS transistors

Philips Semiconductors
4 N-channel 60 mΩ FET array
enhancement mode MOS transistors
Product specification
PHN405
1.2
handbook, halfpage
k
1
0.8
MDA802
1.8
handbook, halfpage
k
1.4
1
MDA803
(1)
(2)
0.6
−75
−25
25
75
125
175
Tj (°C)
k = _V-----G^V----_SG---_t-^Sh---^t--^h_{a---t--a--2-t--5--T--°}--^j-C---
V_GSth at V_DS = V_GS; I_D = 1 mA.
Fig.12 Temperature coefficient of gate-source
threshold voltage as a function of junction
temperature; typical values.
0.6
−75
−25
25
75
125
175
Tj (°C)
k = _R-----D-R---_S-^D--_o--^S-_n--^o--a-ⁿ---t--a-2--t-5---T---_°-^j--C---
R_DSon at:
(1) V_GS = 10 V; I_D = 2 A.
(2) V_GS = 4.5 V; I_D = 1 A.
Fig.13 Temperature coefficient of drain-source
on-resistance as a function of junction
temperature; typical values.
1998 Mar 17
9