74HC3GU04_15 Datasheet, PDF (9/17 Pages) NXP Semiconductors – Triple unbuffered inverter

NXP Semiconductors
74HC3GU04
Triple unbuffered inverter
Remark: All values given are typical values unless otherwise specified.
1 μF _R1
R2
V_CC
U04
Z_L > 10 k.
R1  3 k.
R2  1 M.
Open loop amplification: A_OL = 20 (typical).
Voltage amplification:
A_V
=
–----------------^A----^O----^L---------------- .
1
+
R_-----1_-
R2

1
+
A_OL

V_o(p-p) = V_CC  1.5 V centered at 0.5  V_CC.
Unity gain bandwidth product is 5 MHz (typical).
Input capacitance see Figure 13.
Fig 12. Linear amplifier application
ZL
mna052
80
input
capacitance
(pF)
(1)
60
(2)
40
(3)
20
mna054
0
0
2
4
6 _{VI (V)} 8
(1) V_CC = 2.0 V.
(2) V_CC = 4.5 V.
(3) V_CC = 6.0 V.
Fig 13. Typical input capacitance as a function of the input voltage
74HC3GU04
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 2 October 2013
© NXP B.V. 2013. All rights reserved.
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