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PCA5010 Datasheet, PDF (87/112 Pages) NXP Semiconductors – Pager baseband controller
Philips Semiconductors
Pager baseband controller
Product specification
PCA5010
3T
ALE
PSEN
ALE, PSEN cycle
4T 5T 6T 1T 2T 3T 4T 5T 6T .... nT
0T
tCE
instruction execution cycle
variable
execute time
T
P0
DATA input
P2
AH driven
AL
driven
DATA input
AH driven
MGR161
T being the half period of the internal
6 MHz oscillator for normal external
access and of TCLK for emulation,
programming and test modes.
The minimum duration of one cycle is 6T.
It can be extended by increments of
[0 to n]T if the execution of an instruction
needs more time (dependant of VDD, T,
Temperature, Opcode).
Execution of an op-code goes in parallel
with the external access cycle for the
next sequential byte. Eventually an
already fetched byte is discarded
depending on the executed instruction
(e.g. any jump or return).
12 CHARACTERISTIC CURVES
3
handbook, full pagewidth
IBAT
(mA)
2
1
Fig.46 External access timing.
(1)
(2)
MGR144
0
0
0.4
0.8
1.2
1.6
MIPS
2
VBAT = 1.2 V.
(1) DC/DC converter in normal mode.
(2) DC/DC converter in standby mode.
Fig.47 Measured battery current consumption as function of mean microcontroller instruction rate.
1998 Nov 02
87