PCA5010 Datasheet, PDF (14/112 Pages) NXP Semiconductors – Pager baseband controller

Philips Semiconductors
Pager baseband controller
Product specification
PCA5010
ADDR
(HEX)
NAME
EC DMD0
ED DMD1
EE DMD2
EF DMD3
F0 B
F8 IP1
FC CCON
FD CC0
FE CC1
7
6
5
4
3
2
1
0
R/W
RESET
VALUE
COMMENT
ENB M
− RES LEV BD2 BD1 BD0 RW 00H
ENA AVG6 AVG5 AVG4 AVG3 AVG2 AVG1 AVG0 R 00H ENA is RW
ENC −
BF
− TEST B2
B1
B0 RW 00H
RW 00H
RW 00H bit addressable
PMIN PWD PDC PX6 PSC PX4 PX3 PX2 RW 00H bit addressable
ENB PLUS TEST CIV17 CIV16 − BYPAS SET RW 00H
CIV7 CIV6 CIV5 CIV4 CIV3 CIV2 CIV1 CIV0 RW 00H
CIV15 CIV14 CIV13 CIV12 CIV11 CIV10 CIV9 CIV8 RW 00H
Notes
1. An empty field in this map indicates a bit that can be read or written to by software.
2. Value only reset with RESETIN and not or only partly with an off-restart sequence.
3. This bit cannot be changed by writing to it.
1998 Nov 02
handbook, halfpage
7FH
30H
2FH
bit-addressable space
(bit addresses 0 to 7F)
20H
R7
1FH
R0
18H
R7
17H
R0
10H
4 banks of 8 registers
R7
0FH
(R0 to R7)
R0
08H
R7
07H
R0
0
MLA560 - 1
Fig.5 The lower 128 bytes of internal data memory.
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