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PCA5010 Datasheet, PDF (50/112 Pages) NXP Semiconductors – Pager baseband controller
Philips Semiconductors
Pager baseband controller
Product specification
PCA5010
Table 46 Description of DMD3 bits
BIT
DMD3.7
DMD3.6
DMD3.5
DMD3.4
DMD3.3
DMD3.2
DMD3.1
DMD3.0
SYMBOL
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
Recovered symbols. The
number of relevant bits is
set with DMD2[2 to 0].
6.18 AFC-DAC
6.18.1 FUNCTION
The AFC digital-to-analog converter provides an analog
signal to the receiver to reduce its frequency offset.
The analog signal is available at pin 18 (AFCOUT).
For low noise sensitivity the DAC output is buffered and
can drive a load impedance of 10 kΩ (max.). The output
swing is from rail-to-rail VDD. When the enable signal ENB
is at logic 1 a linear binary conversion is performed
according to Table 47.
Below 0.2 V the linearity of the output voltage is not ideal.
When ENB is logic 0 the AFCOUT pin is tied to VSS and all
currents are switched off.
Table 47 Coding of AFC-DAC
CODE
000000
000001
...
N
...
111111
OUTPUT VOLTAGE
0
1 × 1⁄64VDD
...
N × 1⁄64VDD
...
63 × 1⁄64VDD
6.18.2 AFC-DAC CONTROL/DATA REGISTER (AFCON)
The AFC-DAC Control/Data register AFCON contains the
control bit for enabling the AFC-DAC and the data bits for
setting the output voltage.
Table 48 AFC-DAC Control/Data Register (AFCON, SFR address 9EH)
7
ENB
6
5
4
3
−
AFC5
AFC4
AFC3
2
AFC2
Table 49 Description of the AFCON bits
BIT
AFCON.7
AFCON.6
AFCON.5
AFCON.4
AFCON.3
AFCON.2
AFCON.1
AFCON.0
SYMBOL
ENB
−
AFC5
AFC4
AFC3
AFC2
AFC1
AFC0
FUNCTION
Enable DAC output.
Not used.
6-bit value for DAC output according to Table 47.
1
AFC1
0
AFC0
1998 Nov 02
50