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| PSMN8R0-30YL_1105 Datasheet, PDF (8/14 Pages) NXP Semiconductors – N-channel 8.3 mΩ 30 V TrenchMOS logic level FET in LFPAK | |||
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NXP Semiconductors
PSMN8R0-30YL
N-channel 8.3 m⦠30 V TrenchMOS logic level FET in LFPAK
2
a
03aa27
1.5
1
0.5
0
â60
0
60
120 Tj (°C) 180
VDS
ID
VGS(pl)
VGS(th)
VGS
QGS1 QGS2
QGS
QGD
QG(tot)
003aaa508
Fig 13. Normalized drain-source on-state resistance
factor as a function of junction temperature
10
VGS
(V)
8
6
24V
6V
003aaf428
VDS= 15V
4
2
Fig 14. Gate charge waveform definitions
60
IS
(A)
45
003aaf429
30
Tj = 150 °C
Tj = 25 °C
15
0
0
5
10
15
20
QG (nC)
0
0
0.3
0.6
0.9
1.2
VSD(V)
Fig 15. Gate-source voltage as a function of gate
charge; typical values
Fig 16. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
PSMN8R0-30YL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 â 16 May 2011
© NXP B.V. 2011. All rights reserved.
8 of 14
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