PSMN8R0-30YL_1105 Datasheet, PDF (7/14 Pages) NXP Semiconductors – N-channel 8.3 mΩ 30 V TrenchMOS logic level FET in LFPAK

NXP Semiconductors
PSMN8R0-30YL
N-channel 8.3 mΩ 30 V TrenchMOS logic level FET in LFPAK
40
R_DSon
(mΩ)
V_GS(V) = 2.8
3.0
30
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3.5
20
4.5
10
10
0
0
20
40
60 _ID(A) 80
50
R_DSon
(mΩ)
40
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30
20
10
0
0
4
8
12
16
20
V_GS(V)
Fig 9. Drain-source on-state resistance as a function Fig 10. Drain-source on-state resistance as a function
of drain current; typical values
of gate-source voltage; typical values
10^-1
I_D
(A)
10^-2
003aab271
min
typ
max
10^-3
10^-4
10^-5
3
V_GS(th)
(V)
2
1
max
typ
min
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10^-6
0
1
2 V_GS (V) 3
0
-60
0
60
120
180
T_j (°C)
Fig 11. Sub-threshold drain current as a function of
gate-source voltage
Fig 12. Gate-source threshold voltage as a function of
junction temperature
PSMN8R0-30YL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 16 May 2011
© NXP B.V. 2011. All rights reserved.
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