80CL410 Datasheet, PDF (7/28 Pages) NXP Semiconductors – Low voltage/low power single-chip 8-bit microcontroller with I2C

Philips Semiconductors
Low voltage/low power single-chip
8-bit microcontroller with I²C
Product specification
80CL410/83CL410
PORT OPTIONS
The pins of port 1 (not P1.6/SCL or
P1.7/SDA), port 2, and port 3 may be
individually configured with one of the
following port options (see Figure 1):
Option 1: Standard Port—
quasi-bidirectional I/O with pull-up.
The strong booster pull-up p1 is
turned on for two oscillator periods
after a 0-to-1 transition in the port
latch. See Figure 1(a).
Option 2: Open Drain—quasi-bidirectional
I/O with n-channel open drain
output. Use as an output requires
the connection of an external
pull-up resistor. See Figure 1(b).
Option 3: Push-Pull—output with drive
capability in both polarities. Under
this option, pins can only be used
as outputs. See Figure 1(c).
The definition of port options for port 0 is
slightly different.
Two cases have to be examined. First,
accesses to external memory (EA = 0 or
access above the built-in memory boundary),
and second, I/O accesses.
External Memory Accesses
Option 1: True 0 and 1 are written as
address to the external memory
(strong pull-up is used).
Option 2: An external pull-up resistor is
needed for external accesses.
Option 3: Not allowed for external memory
accesses as the port can only be
used as output.
I/O Accesses
Option 1: When writing a 1 to the port latch,
the strong pull-up p1 will be on for
two oscillator periods. No weak
pull-up exists. Without an external
pull-up, this option can be used as
a high-impedance input.
Option 2: Open drain—quasi-bidirectional
I/O with n-channel open drain
output. Use as an output requires
the connection of an external
pull-up resistor. See Figure 1(c).
Option 3: Push-Pull—output with drive
capability in both polarities. Under
this option, pins can only be used
as outputs.
Individual mask selection of the post-reset
state is available on any of the above pins.
Make your selection by appending “S” or “R”
to option 1, 2, or 3 above (e.g., 1S for a
standard I/O to be set after RESET or 2R for
an open-drain I/O to be reset after RESET.
Option S: Set—after reset, this pin will be
initialized High.
Option R: Reset—after reset, this pin will be
initialized Low.
(a)
Q
FROM PORT LATCH
INPUT DATA
READ PORT PIN
(b)
Q
FROM PORT LATCH
INPUT DATA
READ PORT PIN
STRONG PULL-UP
TWO OSCILLATOR PERIODS
P1
N
+5V
P2
P3
I/O PIN
INPUT
BUFFER
N
I/O PIN
+5V
EXTERNAL
PULL-UP
INPUT
BUFFER
STRONG PULL-UP
+5V
(c)
Q
FROM PORT LATCH
P1
I/O PIN
N
Figure 1. Ports
1995 Jan 20
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