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80CL410 Datasheet, PDF (17/28 Pages) NXP Semiconductors – Low voltage/low power single-chip 8-bit microcontroller with I2C
Philips Semiconductors
Low voltage/low power single-chip
8-bit microcontroller with I2C
Product specification
80CL410/83CL410
DC ELECTRICAL CHARACTERISTICS
Tamb = –40°C to +85°C, VSS = 0V
TEST
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
VDD
Supply voltage
RAM retention voltage in power-down mode
fCLK (see Figure 13)
1.8
6.0
V
1.0
—
V
IDD
Power supply current:
Operating1
OSC 1 option
OSC 2 option
OSC 2 option
OSC 3 option
OSC 4 option
Idle mode2
OSC 1 option
OSC 2 option
OSC 2 option
OSC 3 option
OSC 4 option
Power-down mode3
fCLK = 32kHz, VDD = 1.8V, Tamb = +25°C
—
fCLK = 3.58MHz, VDD = 3V
—
fCLK = 10MHz, VDD = 5V
—
fCLK = 12MHz, VDD = 5V
—
fCLK = 12MHz, VDD = 5V
—
fCLK = 32kHz, VDD = 1.8V, Tamb = +25°C
—
fCLK = 3.58MHz, VDD = 3V
—
fCLK = 10MHz, VDD = 5V
—
fCLK = 12MHz, VDD = 5V
—
fCLK = 12MHz, VDD = 5V
—
VDD = 1.8V, Tamb = +25°C
—
50
µA
2.5
mA
14
mA
16
mA
20
mA
25
µA
1.0
mA
5.0
mA
7.0
mA
8.5
mA
10
µA
VIL
Input low voltage
VSS
0.3VDD
V
VIH
Input high voltage
0.7VDD
VDD
V
IOL
Output sink current, except SDA, SCL
VDD = 5V, VOL = 0.4V
1.6
mA
VDD = 2.5V, VOL = 0.4V
0.7
mA
IOL1
Output sink current, SDA, SCL
VDD = 5V, VOL = 0.4V
3.0
mA
IOH
Output source current (push-pull options only)
VDD = 5V, VOH = VDD – 0.4V
1.6
mA
VDD = 2.5V, VOH = VDD – 0.4V
0.7
mA
IIL
Logical 0 input current, ports 1, 2, 3
VDD = 5V,VIN = 0.4V
VDD = 2.5V,VIN = 0.4V
–100
µA
–50
µA
ITL
Logical 1-to-0 transition current, ports 1, 2, 3
VDD = 5V, VIN = VDD/2
VDD = 2.5V, VIN = VDD/2
–1.0
mA
–500
µA
ILI
Input leakage current, port 0, EA
VSS < VI < VDD
±10
µA
RRST
Internal reset pull-down resistor
10
200
kΩ
NOTES:
1. The operating supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 10ns; VIL = VSS, VIH = VDD; XTAL2
not connected; EA = RST = Port 0 = VDD; all open drain outputs connected to VSS.
2. The idle supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 10ns; VIL = VSS, VIH = VDD; XTAL2 not
connected; EA = Port 0 = VDD; RST = VSS; all open drain outputs connected to VSS.
3. The power-down current is measured with all output pins disconnected; XTAL1 not connected; EA = port 0 = VDD; RST = VSS; all open-drain
outputs connected to VSS.
4. The RC-oscillator is not implemented in this version.
5. Circuits with “power-on reset” option “OFF” are tested at VDDMIN = 1.8V, with option “ON” (typically 1.3V) are tested at VDDMIN = 2.3V.
1995 Jan 20
17