80CL410 Datasheet, PDF (10/28 Pages) NXP Semiconductors – Low voltage/low power single-chip 8-bit microcontroller with I2C

Philips Semiconductors
Low voltage/low power single-chip
8-bit microcontroller with I²C
Product specification
80CL410/83CL410
S1STA (D9H)
Status register
SC4 SC3 SC2 SC1 SC0 0
0
0
S1STA is an 8-bit read-only special function
register. S1STA.3–S1STA.7 hold a status
code. S1STA.0–S1STA.2 are held LOW. The
contents of S1STA may be used as a vector
to a service routine. This optimizes response
time of the software and consequently that of
the I²C-bus.
The following is a list of the status codes:
Abbreviations used:
SLA: 7-bit slave address
R: Read bit
W: Write bit
ACK: Acknowledgement (acknowledge
bit = 0)
ACK: Not Acknowledge (acknowledge
bit = 1)
DATA: 8-bit byte to or from the I²C-bus
MST: Master
SLV: Slave
TRX: Transmitter
REC: Receiver
MST/TRX mode
S1STA value
08H – a START condition has been
transmitted
10H – a repeated START condition has
been transmitted
18H – SLA and W have been transmitted,
ACK received
20H – SLA and W have been transmitted,
ACK received
28H – DATA of S1DAT has been
transmitted, ACK received
30H – DATA of S1DAT has been
transmitted, ACK received
38H – Arbitration lost in SLA, R/W or DATA
MST/REC mode
S1STA value
08H – a START condition has been
transmitted
10H – a repeated START condition has
been transmitted
38H – Arbitration lost while returning ACK
40H – SLA and R have been transmitted,
ACK received
48H – SLA and R have been transmitted,
ACK received
50H – DATA has been received, ACK
returned
58H – DATA has been received, ACK
returned
SLV/REC mode
S1STA value
60H – Own SLA and W have been received,
ACK returned
68H – Arbitration lost in SLA, R/W as MST.
Own SLA and W have been received,
ACK returned
70H – General CALL has been received,
ACK returned
78H – Arbitration lost in SLA, R/W as MST.
General CALL has been received
80H – Previously addressed with own SLA.
DATA byte received, ACK returned
88H – Previously addressed with own SLA.
DATA byte received, ACK returned
90H – Previously addressed with general
CALL. DATA byte has been received,
ACK has been returned
98H – Previously addressed with general
CALL. DATA byte has been received,
ACK has been returned
A0H – A STOP condition or repeated START
condition has been received while still
addressed as SLV/REC or SLV/TRX
SLV/TRX mode
S1STA value
A8H – Own SLA and R have been received,
ACK returned
B0H – Arbitration lost in SLA, R/W as MST.
Own SLA and R have been received,
ACK returned
B8H – DATA byte has been transmitted,
ACK received
C0H – DATA byte has been transmitted,
ACK received
C8H – Last DATA byte has been transmitted
(AA = logic 0), ACK received
Miscellaneous
S1STA value
00H – Bus error during MST mode or
selected SLV mode, due to an
erroneous START or STOP condition
F8H – No relevant state interruption
available, SI = 0.
S1DAT (DAH)
Data Shift Register
7
6
543
2
10
Data shift register S1DAT
This register contains the serial data to be
transmitted or data that has just been
received. Bit 7 is transmitted or received first,
i.e., data is shifted from left to right.
S1ADR (DBH)
Slave Address Register
7
6
543
2
10
S1ADR.0, GC: 0 = general CALL address is
not recognized
1 = general CALL address is
recognized
S1ADR.7-1: own slave address
This 8-bit register may be loaded with the
7-bit slave address, to which the controller
will respond when programmed as a slave
receiver/transmitter. The LSB bit (GC) is used
to determine whether the general CALL
address is recognized.
Table 3. SCL Frequency
CR2
0
0
0
0
1
1
1
1
CR1
0
0
1
1
0
0
1
1
CR0
0
1
0
1
0
1
0
1
f_OSC DIVIDED BY
256
224
192
160
960
120
60
not allowed
3.58MHz
14.0
16.0
18.6
22.4
3.73
29.8
59.7
–
BIT RATE (kHz) at f_OSC
6MHz
23.4
26.8
31.3
37.5
6.25
50
100
–
12MHz
46.9
53.6
62.5
75.0
12.5
100
–
–
1995 Jan 20
10