BUK203-50Y Datasheet, PDF (6/13 Pages) NXP Semiconductors – PowerMOS transistor TOPFET high side switch

Philips Semiconductors
PowerMOS transistor
TOPFET high side switch
VBG
VSG
VIG
VBL
IB
II
B
I
TOPFET
IL
IS
HSS ^L
S
G
VLG
RS
IG
Fig.4. High side switch measurements schematic.
(current and voltage conventions)
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.5. Normalised limiting power dissipation.
P_D% = 100⋅P_D/P_D(25 ˚C) = f(T_mb)
IL / A
8
BUK203-50Y
7
6
5
4
3
2
1
0
0
20
40
60
80
100 120 140
Tmb / C
Fig.6. Limiting continuous on-state load current.
I_L = f(T_mb); conditions: V_IG = 5 V, V_BG = 13 V
Product specification
BUK203-50Y
IL / A
10
BUK203-50Y
9
VBG / V =
13
7
8
6
7
6
5
5
4
3
2
1
0
0
0.5
1
1.5
2
VBL / V
Fig.7. Typical on-state characteristics, T_j = 25 ˚C.
I_L = f(V_BL); parameter V_BG; t_p = 250 µs
RON / Ohm
400
BUK203-50Y
300
200
100
0
1
10
100
VBG / V
Fig.8. Typical on-state resistance, T_j = 25 ˚C.
R_ON = f(V_BG); conditions: I_L = 2 A; t_p = 300 µs
RON / Ohm
0.5
0.4
0.3
BUK203-50Y
VBG =
5V
13 V
0.2
typ.
0.1
0
-60
-20
20
60
100
140
180
Tj / C
Fig.9. Typical on-state resistance, t_p = 300 µs.
R_ON = f(T_j); parameter V_BG; condition I_L = 0.5 A
April 1995
6
Rev 1.100