PHU2N50E Datasheet, PDF (4/9 Pages) NXP Semiconductors – PowerMOS transistors Avalanche energy rated

Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
120 ^PD%
Normalised Power Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅P_D/P_{D 25 ˚C} = f(T_mb)
ID%
120
Normalised Current Derating
110
100
90
80
70
60
50
40
30
20
10
0
0 20 40 60 80 100 120 140
Tmb / C
Fig.2. Normalised continuous drain current.
ID% = 100⋅I_D/I_{D 25 ˚C} = f(T_mb); conditions: V_GS ≥ 10 V
10 ^{Drain current, ID (Amps)}
Tmb
= 25 C
RDS(ON)
=
VDS/ID
1
DC
0.1
PHP2N50
tp =
10 us
100us
1 ms
10 ms
100ms
0.01
10
100
Drain-source voltage, VDS (Volts)
1000
Fig.3. Safe operating area. T_mb = 25 ˚C
I_D & I_DM = f(V_DS); I_DM single pulse; parameter t_p
Product specification
PHU2N50E
10 ^{Zth j-mb / (K/W)}
D=
1
0.5
0.2
0.1
0.05
0.1
0.02
0
0.01
10us
P_D
1ms
t/s
tp
D
=
tp
T
T
t
0.1s
10ms
Fig.4. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
6 ^{ID, Drain current (Amps)}
Tj = 25 C
5
PHP2N50
20 V
4
10 V
7V
3
6.5 V
2
6V
1
5.5 V
VGS = 5 V
0
0
5
10
15
20
25
30
VDS, Drain-Source voltage (Volts)
Fig.5. Typical output characteristics.
I_D = f(V_DS); parameter V_GS
Drain-Source on resistance, RDS(ON) (Ohms)
10
5V 5.5 V 6 V
6.5 V
8
7V
PHP2N50
Tj = 25 C
6
10 V
4
VGS = 20 V
2
0
0
1
2
3
4
5
Drain current, ID (Amps)
Fig.6. Typical on-state resistance.
R_DS(ON) = f(I_D); parameter V_GS
May 1999
4
Rev 1.000