PHU2N50E Datasheet, PDF (1/9 Pages) NXP Semiconductors – PowerMOS transistors Avalanche energy rated

Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
Product specification
PHU2N50E
FEATURES
• Repetitive Avalanche Rated
• Fast switching
• Stable off-state characteristics
• High thermal cycling performance
• Low thermal resistance
• Extremely high dV/dt capability
QUICK REFERENCE DATA
V_DSS = 500 V
I_D = 2 A
R_DS(ON) ≤ 5 Ω
GENERAL DESCRIPTION
N-channel, enhancement mode field-effect power transistor, intended for use in Compact Fluorescent Lamps (CFL)
and low power ballasts. The PHU2N50E is compatible with self oscillating and IC driven circuits, including the UBA2021
ballast controller IC. Other applications include off line switched mode power supplies and D.C. to D.C. converters.
The PHU2N50E is supplied in the SOT533 (I-PAK) leaded package.
PINNING
SYMBOL
SOT533
PIN DESCRIPTION
d
------------- ---------------------------------
1 gate
2 drain
g
3 source
tab drain
123
s
Top view
MBK915
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_DSS
V_DGR
V_GS
I_D
I_DM
P_D
dV/dt
T_j, T_stg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total dissipation
Peak Diode Recovery
voltage slope. (See fig. 19)
Operating junction and
storage temperature range
T_j = 25 ˚C to 150˚C
T_j = 25 ˚C to 150˚C; R_GS = 20 kΩ
T_mb = 25 ˚C; V_GS = 10 V
T_mb = 100 ˚C; V_GS = 10 V
T_mb = 25 ˚C
T_mb = 25 ˚C
I_ds 2.0 A; dI/dt = 100 A/µs;
V_s = 8V; T_j < T_jmax
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
500
500
± 30
2
1.3
8
50
5.2
150
UNIT
V
V
V
A
A
A
W
V/ns
˚C
May 1999
1
Rev 1.000