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74HC4046A Datasheet, PDF (4/34 Pages) NXP Semiconductors – Phase-locked-loop with VCO
Philips Semiconductors
Phase-locked-loop with VCO
Product specification
74HC/HCT4046A
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C
SYMBOL
PARAMETER
fo
VCO centre frequency
CI
input capacitance (pin 5)
CPD
power dissipation capacitance per
package
CONDITIONS
TYPICAL
HC HCT
C1 = 40 pF; R1 = 3 kΩ; VCC = 5 V 19 19
3.5 3.5
notes 1 and 2
24 24
UNIT
MHz
pF
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz.
fo = output frequency in MHz.
CL = output load capacitance in pF.
VCC = supply voltage in V.
∑ (CL × VCC2 × fo) = sum of outputs.
2. Applies to the phase comparator section only (VCO disabled). For power dissipation of the VCO and demodulator
sections see Figs 22, 23 and 24.
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
APPLICATIONS
• FM modulation and demodulation
• Frequency synthesis and multiplication
• Frequency discrimination
• Tone decoding
• Data synchronization and conditioning
• Voltage-to-frequency conversion
• Motor-speed control.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
1997 Nov 25
4