74HC4046A Datasheet, PDF (18/34 Pages) NXP Semiconductors – Phase-locked-loop with VCO

Philips Semiconductors
Phase-locked-loop with VCO
Product specification
74HC/HCT4046A
SYMBOL PARAMETER
t_PHZ/
t_PLZ
t_THL/
t_TLH
V_{I (p-p)}
3-state output disable
time SIG_IN, COMP_IN
to PC2_OUT
output transition time
AC coupled input
sensitivity
(peak-to-peak value)
at
SIG_IN or COMP_IN
T_amb (°C)
TEST CONDITIONS
74HCT
+25
−40 to +85
UNIT
−40 to +125
V_CC
(V)
OTHER
min. typ. max. min. max. min. max.
36 65
81
98 ns 4.5 Fig.17
7 15
19
22 ns 4.5 Fig.16
15
mV 4.5 f_i = 1 MHz
VCO section
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
SYMBOL PARAMETER
∆f/T
frequency stability
with temperature
change
+25
min. typ.
f_o
VCO centre frequency 11.0 17.0
(duty factor = 50%)
∆f_VCO
VCO frequency
0.4
linearity
δ_VCO
duty factor at VCO_OUT
50
T_amb (°C)
TEST CONDITIONS
74HCT
−40 to +85
UNIT
−40 to +125
V_CC
(V)
OTHER
max min. max min. max.
0.15
%/K 4.5
V_I = V_VCOIN withi
n recommended
range;
R1 = 100 kΩ;
R2 = ∞;
C1 = 100 pF;
see Fig.18b
MHz 4.5
V_VCOIN = 1/2 V_CC
;
R1 = 3 kΩ;
R2 = ∞;
C1 = 40 pF;
see Fig.19
% 4.5 R1 = 100 kΩ;
R2 = ∞;
C1 = 100 pF;
see Figs 20
and 21
% 4.5
1997 Nov 25
18