74HC4046A Datasheet, PDF (21/34 Pages) NXP Semiconductors – Phase-locked-loop with VCO

boo_∆k,_f²h⁵alfpage
(%)
20
15
10
5
0
MSB710
handbook,²h⁵alfpage
∆f
(%)
20
VCC =
15
6V
5V
10
3V
3V
5
4.5 V
5V
6V
0
MSB711
handbook,²h⁵alfpage
∆f
(%)
20
3V
VCC =
3V
15
5V
A
6V
5V
10
6V
5
0
VCC =
3V
5V
6V
MSB712
3V
5V
6V
−5
5
5
−10
10
10
−15
15
15
−20
20
20
−25
−50
0
50
100
150
Tamb (^oC)
(a)
25
50
0
50
100
150
Tamb (^oC)
(b)
25
50
0
50
100
150
Tamb (^oC)
(c)
To obtain optimum temperature stability, C1 must be as small as possible but larger than 100 pF.
Fig.18 Frequency stability of the VCO as a function of ambient temperature with supply voltage as a parameter.
 without offset (R2 = ∞): (a) R1 = 3 kΩ; (b) R1 = 10 kΩ; (c) R1 = 300 kΩ.
− − − with offset (R1 = ∞): (a) R2 = 3 kΩ; (b) R2 = 10 kΩ; (c) R2 = 300 kΩ.
In (b), the frequency stability for R1 = R2 = 10 kΩ at 5 V is also given (curve A). This curve is set by the total VCO bias current, and is
not simply the addition of the two 10 kΩ stability curves. C1 = 100 pF; V_{VCO IN} = 0.5 V_CC.