74HC4046A Datasheet, PDF (14/34 Pages) NXP Semiconductors – Phase-locked-loop with VCO

Philips Semiconductors
Phase-locked-loop with VCO
Product specification
74HC/HCT4046A
VCO section
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
−40 to +85
−40 to +125
UNIT _VCC OTHER
(V)
min. typ. max. typ. max. min. max.
∆f/T
frequency stability
0.20
with temperature
0.15
change
0.14
f_o
VCO centre
7.0 10.0
frequency (duty _{11.0 17.0}
factor = 50%)
13.0 21.0
∆f_VCO
VCO frequency
1.0
linearity
0.4
0.3
δ_VCO
duty factor at
50
VCO_OUT
50
50
%/K 3.0 V_I = V_VCOIN = 1/2 V_CC;
4.5 ^{R1 = 100 kΩ; R2 = ∞;}
6.0 ^{C1 = 100 pF; see Fig.18}
MHz 3.0 V_VCOIN = 1/2 V_CC;
4.5 ^{R1 = 3 kΩ; R2 = ∞;}
6.0 ^{C1 = 40 pF; see Fig.19}
% 3.0 R1 = 100 kΩ; R2 = ∞;
4.5 ^{C1 = 100 pF;}
6.0 ^{see Figs 20 and 21}
% 3.0
4.5
6.0
DC CHARACTERISTICS FOR 74HCT
Quiescent supply current
Voltages are referenced to GND (ground = 0 V)
SYMBOL PARAMETER
I_CC
quiescent supply
current
(VCO disabled)
∆I_CC
additional quiescent
supply current per
input pin for unit load
coefficient is 1 (note 1)
V_I = V_CC − 2.1 V
T_amb (°C)
TEST CONDITIONS
74HCT
+25
−40 to +85
UNIT
−40 to +125
V_CC
(V)
OTHER
min. typ. max. min. max. min. max.
8.0
80.0
160.0 µA 6.0 pins 3, 5 and 14
at V_CC; pin 9 at
GND; I_I at
pins 3 and 14 to
be excluded
100 360
450
490 µA 4.5 pins 3 and 14
to at V_CC;
5.5 pin 9 at GND;
I_I at pins 3 and 14
to be excluded
Note
1. The value of additional quiescent supply current (∆I_CC) for a unit load of 1 is given above.
To determine ∆I_CC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
INH
UNIT LOAD COEFFICIENT
1.00
1997 Nov 25
14