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PSMN3R5-30LL_11 Datasheet, PDF (3/15 Pages) NXP Semiconductors – N-channel DFN3333-8 30 V 3.6 mΩ logic level MOSFET
NXP Semiconductors
PSMN3R5-30LL
N-channel DFN3333-8 30 V 3.6 mΩ logic level MOSFET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
IDM
peak drain current
Ptot
total power dissipation
Tstg
storage temperature
Tj
junction temperature
Tsld(M)
peak soldering temperature
Source-drain diode
Conditions
Tj ≥ 25 °C; Tj ≤ 150 °C
Tj ≤ 150 °C; Tj ≥ 25 °C; RGS = 20 kΩ
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1
pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 3
Tmb = 25 °C; see Figure 2
IS
source current
ISM
peak source current
Avalanche ruggedness
Tmb = 25 °C
pulsed; tp ≤ 10 µs; Tmb = 25 °C
EDS(AL)S
non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 40 A;
Vsup ≤ 30 V; unclamped; RGS = 50 Ω
Min Max Unit
-
30 V
-
30 V
-20 20 V
-
40 A
-
40 A
-
423 A
-
71 W
-55 150 °C
-55 150 °C
-
260 °C
-
40 A
-
423 A
-
118 mJ
120
ID
(A)
100
80
60
40
20
0
0
003aae139
(1)
50
100
150
200
Tmb (°C)
120
Pder
(%)
80
003aab937
40
0
0
50
100
150
200
Tmb (°C)
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of solder point temperature
PSMN3R5-30LL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 12 December 2011
© NXP B.V. 2011. All rights reserved.
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