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| PSMN3R5-30LL_11 Datasheet, PDF (2/15 Pages) NXP Semiconductors – N-channel DFN3333-8 30 V 3.6 mΩ logic level MOSFET | |||
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NXP Semiconductors
PSMN3R5-30LL
N-channel DFN3333-8 30 V 3.6 m⦠logic level MOSFET
Table 1.
Symbol
QG(tot)
Quick reference data â¦continued
Parameter
total gate charge
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-source
avalanche energy
2. Pinning information
Conditions
VGS = 4.5 V; ID = 15 A; VDS = 15 V;
see Figure 14; see Figure 15
VGS = 10 V; ID = 15 A; VDS = 15 V;
see Figure 14; see Figure 15
VGS = 10 V; Tj(init) = 25 °C;
ID = 40 A; Vsup ⤠30 V; unclamped;
RGS = 50 â¦
Min Typ Max Unit
-
18
-
nC
-
37
-
nC
-
-
118 mJ
Table 2.
Pin
1
2
3
4
5,6,7,8
mb
Pinning information
Symbol Description
S
source
S
source
S
source
G
gate
D
drain
D
mounting base; connected to drain
Simplified outline
8765
1234
Transparent
top view
SOT873-1 (DFN3333-8)
Graphic symbol
D
G
mbb076 S
3. Ordering information
Table 3. Ordering information
Type number
Package
Name
PSMN3R5-30LL
DFN3333-8
Description
plastic thermal enhanced very thin small outline package; no
leads; 8 terminals
Version
SOT873-1
PSMN3R5-30LL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 â 12 December 2011
© NXP B.V. 2011. All rights reserved.
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