English
Language : 

PSMN130-200D_15 Datasheet, PDF (3/12 Pages) NXP Semiconductors – N-channel TrenchMOS SiliconMAX standard level FET
NXP Semiconductors
PSMN130-200D
N-channel TrenchMOS SiliconMAX standard level FET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
VDGR
VGS
ID
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
IDM
peak drain current
Ptot
total power dissipation
Tstg
storage temperature
Tj
junction temperature
Source-drain diode
Conditions
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
VGS = 10 V; Tmb = 100 °C
VGS = 10 V; Tmb = 25 °C
pulsed; Tmb = 25 °C
Tmb = 25 °C
IS
source current
ISM
peak source current
Avalanche ruggedness
Tmb = 25 °C
pulsed; Tmb = 25 °C
EDS(AL)S
IAS
non-repetitive drain-source
avalanche energy
non-repetitive avalanche
current
VGS = 10 V; Tj(init) = 25 °C; ID = 19 A;
Vsup ≤ 25 V; unclamped; tp = 100 µs;
RGS = 50 Ω
Vsup ≤ 25 V; VGS = 10 V; Tj(init) = 25 °C;
RGS = 50 Ω; unclamped
Min Max Unit
-
200 V
-
200 V
-20 20 V
-
14 A
-
20 A
-
80 A
-
150 W
-55 175 °C
-55 175 °C
-
20 A
-
80 A
-
252 mJ
-
20 A
100
Pder
(%)
80
014aab264
60
40
20
0
0 25 50 75 100 125 150 175
Tmb (°C)
100
ID
(%)
80
014aab265
60
40
20
0
0 25 50 75 100 125 150 175
Tmb (°C)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature
Fig 2. Normalized continuous drain current as a
function of mounting base temperature
PSMN130-200D
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 20 December 2010
© NXP B.V. 2010. All rights reserved.
3 of 12