PIP212-12M Datasheet, PDF (3/21 Pages) NXP Semiconductors – DC-to-DC converter powertrain

Philips Semiconductors
6. Pinning information
6.1 Pinning
PIP212-12M
DC-to-DC converter powertrain
terminal 1
index area
V_SSC 1
VDDG_EN 2
V_DDG 3
V_DDC 4
CBP 5
n.c 6
V_SSC 7
V_DDO 8
n.c. 9
CBN 10
V_DDO 11
V_DDO 12
V_DDO 13
V_DDO 14
V_SSC
PAD 1
V_DDO
PAD 2
PIP212-12M
VO
PAD 3
42 VO
41 V_SSO
40 V_SSO
39 V_SSO
38 V_SSO
37 V_SSO
36 V_SSO
35 V_SSO
34 V_SSO
33 V_SSO
32 V_SSO
31 V_SSO
30 V_SSO
29 V_SSO
Fig 2. Pin configuration
03ao38
Transparent top view
6.2 Pin description
Table 2: Pin description
Symbol Pin
Type Description
V_DDC
V_DDO
V_SSC
V_SSO
VI
4
-
8, 11 to 20, pad 2 I
1, 7, 51, pad 1 -
22 to 41
-
56
I
control circuit supply voltage
output stage supply voltage
control circuit ground
output stage (supply) ground
pulse width modulated input
VO
42 to 50, pad 3 O output voltage
VO_SENSE 21
O sense connection to VO often required by PWM for
current sensing
CBP
5
-
connection for bootstrap capacitor
CBN
10
-
connection for bootstrap capacitor
VDDG_EN 2
V_DDG
3
AIS
52
I
enables internal 6.5 V regulator for V_DDG
-
gate drive supply voltage
O indicates the switching status of VO (open drain)
PRDY
53
O indicates that V_DDC is above the UVLO level (open drain)
9397 750 14586
Preliminary data sheet
Rev. 02 — 2 March 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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