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PHP125 Datasheet, PDF (3/12 Pages) NXP Semiconductors – P-channel enhancement mode MOS transistor
Philips Semiconductors
P-channel enhancement mode
MOS transistor
Product specification
PHP125
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
VDS
drain-source voltage (DC)
VGS
gate-source voltage (DC)
ID
drain current (DC)
IDM
peak drain current
Ptot
total power dissipation
Tstg
storage temperature
Tj
operating junction temperature
Source-drain diode
IS
source current (DC)
ISM
peak pulsed source current
CONDITIONS
Ts = 80 °C; note 1
note 2
Ts = 80 °C
Tamb = 25 °C; note 3
Tamb = 25 °C; note 4
Ts = 80 °C
note 2
MIN.
−
−
−
−
−
−
−
−65
−65
−
−
Notes
1. Ts is the temperature at the soldering point of the drain lead.
2. Pulse width and duty cycle limited by maximum junction temperature.
3. Value based on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 27.5 K/W.
4. Value based on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 90 K/W.
MAX.
−30
±20
−2.5
−10
2.8
2.4
1.1
+150
+150
UNIT
V
V
A
A
W
W
W
°C
°C
−2
A
−8
A
handbook, h6alfpage
Ptot
(W)
4
MBG848
2
0
0
50
100
150 Ts (oC) 200
Fig.2 Power derating curve.
1997 Jun 18
−102
handbook, halfpage
ID
(A)
−10
(1)
−1
P
−10−1
δ
=
tp
T
−10−2
−10−1
tp
t
T
−1
MBG752
tp =
10 µs
100 µs
1 ms
10 ms
DC
100 ms
−10 VDS (V) −102
δ = 0.01; TS = 80 °C.
(1) RDSon limitation.
Fig.3 SOAR.
3