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PR31700 Datasheet, PDF (27/36 Pages) NXP Semiconductors – 32-bit RISC microprocessor | |||
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Philips Semiconductors
32-bit RISC microprocessor
Preliminary specification
PR31700
AC CHARACTERISTICS
The following operating conditions apply to all values specified in this section.
Tamb = 0°C to 70°C, VDD = 3.3 ±0.3V, External Capacitance = 40pF
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Item
Parameter
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 1
DCLKOUT high time
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 2
DCLKOUT low time
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 3
DCLKOUT period
4
Delay DCLKOUT to ALE
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to ALE
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Memory Interface
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to A[12:0]
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to D[31:16]
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to D[15:0]
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CS3â0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CS3â0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to RD*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to RD*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to WE*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to WE*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CAS3â0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CAS3â0*
4
Delay DCLKOUT to CARDxCSx*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDxCSx*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDDIR*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDDIR*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDREG*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDREG*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDIORD*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDIORD*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDIOWR*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to CARDIOWR*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to RAS0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to RAS0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to RAS1*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to RAS1*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to DQMH/L
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to DQMH/L
4
Delay DCLKOUT to DCS0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to DCS0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to DCKE
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to DCKE
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to MCS3â0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 4
Delay DCLKOUT to MCS3â0*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ 5
D[31 : 16] to DCLKIN Setup time
Rising / Falling
-
-
-
Rising
Falling
-
-
-
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Fallmng
Rising
Fatting
Rising
Falling
Rising
Falljng
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
-
MIN.
MAX.
Unit
5.4
-
ns
5.4
-
ns
13.5
-
ns
-
4
ns
-
3
ns
-
8
ns
-
8
ns
1.5
8
ns
-
10
ns
-
10
ns
-
8
ns
-
7
ns
-
5
ns
-
4
ns
-
2.5
ns
-
2.5
ns
-
9
ns
-
8
ns
-
12
ns
-
11
ns
-
9
ns
-
10
ns
-
10
ns
-
9
ns
-
9
ns
-
9
ns
-
6
ns
-
6
ns
1.5
8
ns
1.5
9
ns
1.5
8
ns
1.5
9
ns
1.5
7
ns
1.5
6
ns
1.5
8
ns
1.5
8
ns
-
10
ns
-
10
ns
1
-
ns
1998 May 13
27
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