PR31700 Datasheet, PDF (16/36 Pages) NXP Semiconductors – 32-bit RISC microprocessor

Philips Semiconductors
32-bit RISC microprocessor
Preliminary specification
PR31700
Table 2 lists various power-down states and conditions for each PR31700 pin. The ”Power-Down Control” column shows the conditions which
trigger a power-down for each respective pin. This column also shows the reset state for each of these conditions.
The ”PON* state” column defines the state of each pin at power-on reset (PON*). This condition is defined as initial power up of the
PR31700, whereby the PR31700 is initialized and the PR31700 pins are reset to the state shown in the table. This state is entered
after power is applied for the very first time (VSTANDBY is turned on but VCC3 is still turned off).
The ”1st-time power-up state” column defines the state of each pin after power-up mode (RUNNING STATE) is executed for the
first time. This mode is defined as VCC3 applied to the entire system and is initiated by the user pressing the ONBUTN while in
the power-on reset (PON*) state. Note that the defined state of various pins for 1st-time power-up may depend on the configuration
of external devices attached to these pins. After 1st-time power-up, the software could change the state of various pins to be
different from those shown in the table. Thereafter, subsequent transitions from SLEEP STATE to RUNNING STATE might result in
different states for these pins.
The ”power-down state” column defines the state of each pin during power-down mode (SLEEP STATE). This mode is defined as
VCC3 turned off to the entire system, except for the PR31700 (RTC and interrupts alive) and any persistent memory.
1998 May 13
16