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PR31700 Datasheet, PDF (21/36 Pages) NXP Semiconductors – 32-bit RISC microprocessor | |||
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Philips Semiconductors
32-bit RISC microprocessor
Preliminary specification
PR31700
PERIPHERAL FUNCTIONS
CLOCK GENERATOR
The PR31700 uses an internal PLL and an external crystal oscillator
to generate a clock with eight times the input clock frequency. The
PLL oscillation can be halted externally to reduce power dissipation.
WRITE BUFFER
The PR31700 incorporates a four-stage write buffer.
BUS INTERFACE UNIT (BIU) MODULE
The PR31700 has a Bus Interface Unit with the following features.
⢠supports 2 Banks of SDRAM and/or DRAM / HDRAM
â 8-bit or 16-bit SDRAM configuration
â 16-bit or 32-bit DRAM configuration
â 16-bit or 32-bit HDRAM configuration
â 4 Mbit, 16 Mbit and 64 Mbit parts supported
â page mode reads and writes supported
â independent refresh counters for each bank
â self refreshing parts supported to retain memory when
system is powered down
⢠4 general purpose chip selects (CS3*âCS0*)
â 16-bit or 32-bit ports
â programmable wait states
â read page mode
⢠4 general purpose chip selects (MCS3*âMCS0*)
â 16-bit ports
â programmable wait states
â read page mode
⢠2 full PCMCIA slots
â 16-bit ports
â IORD and IOWR provided to support I/O cards
â WAIT signal supported
SYSTEM INTERFACE UNIT (SIU) MODULE
The PR31700 has a System Interface Unit with the following
features.
⢠multi-channel 32-bit DMA controller
⢠independent DMA controller for video, SIB to/from BETTY
audio/telecom codecs, high-speed serial port, IR, UART, and
general purpose UART
⢠address decoding for the internal registers
CLOCK MODULE
The PR31700 has a Clock Module with the following features.
⢠The PR31700 supports system-wide single crystal
configuration, besides the 32 kHz RTC XTAL (reduces cost,
power, and board space)
⢠common crystal rate divided to generate clock for CPU,
video, sound, telecom, UARTs, etc.
⢠independent enabling or disabling of individual clocks under
software control, for power management
CONCENTRATION HIGHWAY INTERFACE (CHI) MODULE
The PR31700 has a CHI Module with the following features.
⢠high-speed serial Concentration Highway Interface (CHI)
contains logic for interfacing to external full-duplex serial
time-division-multiplexed (TDM) communication peripherals
⢠supports ISDN line interface chips and other PCM/TDM
serial devices
⢠CHI interface is programmable (number of channels, frame
rate, bit rate, etc.) to provide support for a variety of
formats
⢠supports data rates up to 4.096 Mbps
⢠independent DMA support for CHI receive and transmit
INTERRUPT MODULE
The PR31700 has an Interrupt Module with the following features.
⢠contains logic for individually enabling, reading, and clearing
all PR31700 interrupt sources
⢠interrupts generated from internal PR31700 modules or from
edge transitions on external signal pins
IO MODULE
The PR31700 has an IO Module with the following features.
⢠contains support for reading and writing the 7 bi-directional
general purpose IO pins and the 32 bi-directional
multi-function IO pins
⢠each IO port can generate a separate positive and negative
edge interrupt
⢠independently configurable IO ports allow the PR31700 to
support a flexible and wide range of system applications and
configurations
IR MODULE
The PR31700 has an IR Module with the following features.
⢠IR consumer mode
â allows control of consumer electronic devices such as
stereos, TVs, VCRs, etc.
â programmable pulse parameters
â external analog LED circuitry
⢠IRDA communication mode
â not compatible with General Magic Cap Devices
â allows communication with other IRDA devices such as
FAX machines, copiers, printers, etc.
â supported by the UART module within the PR31700
â external analog receiver preamp and LED circuitry
â data rate = up to 115 kbps at 1 meter
⢠IR FSK communication mode
â compatible with GeneraI Magic Cap Devices
â supported by the UART module within the PR31700
â external analog IR chip(s) perform frequency modulation to
generate the desired IR communication mode protocol
â data rate = up to 36000 bps at 3 meters
⢠carrier detect state machine
â periodically enables IR receiver to check if a valid carrier
is present
1998 May 13
21
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