|
PR31700 Datasheet, PDF (18/36 Pages) NXP Semiconductors – 32-bit RISC microprocessor | |||
|
◁ |
Philips Semiconductors
32-bit RISC microprocessor
Preliminary specification
PR31700
Table 2. PR31700 Power-Down Pin Usage (Continued)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ PR31700 pin
Power-Down Control
powerdown = (vccon & vcc3)*
(reset state)
MBUSDATA
MODULE DISABLE
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ MBUSINT
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ TXD
POWERDOWN & MIOPD[24] (0)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ RXD
POWERDOWN & MIOPD[23] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CS0*
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CS1*
POWERDOWN & MIOPD[22] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CS2*
POWERDOWN & MIOPD[21] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CS3*
POWERDOWN & MIOPD[20] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ MCS0*
POWERDOWN & MIOPD[19] (0)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ MCS1*
POWERDOWN & MIOPD[18] (0)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ MCS2*
POWERDOWN & MIOPD[17] (0)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ MCS3*
POWERDOWN & MIOPD[16] (0)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CHIFS
POWERDOWN & MIOPD[31] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CHICLK
POWERDOWN & MIOPD[30] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CHIDOUT
POWERDOWN & MIOPD[29] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CHIDIN
POWERDOWN & MIOPD[28] (1)
VCC3
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IO6
POWERDOWN & IOPD[6] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IO5
POWERDOWN & IOPD[5] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IO4
POWERDOWN & IOPD[4] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IO3
POWERDOWN & IOPD[3] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IO2
POWERDOWN & IOPD[2] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IO1
POWERDOWN & IOPD[1] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IO0
POWERDOWN & IOPD[0] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ SPICLK
POWERDOWN & MIOPD[15] (0)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ SPIOUT
POWERDOWN & MIOPD[14] (0)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ SPIIN
POWERDOWN & MIOPD[13] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ SIBSYNC
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ SIBDOUT
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ SIBDIN
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ SIBMCLK
POWERDOWN & MIOPD[12] (1)
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ SIBSCLK
POWERDOWN
SIBIRQ
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ RXPWR
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ CARDET
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IROUT
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ IRIN
POWERDOWN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ TESTAIU
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ TESTCPU
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ TESTIN
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ VIDDONE
MODULE DISABLE
PON* state
Out Low
Low
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
In
In
In
In
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Pull-Down
Low
Low
Pull-Down
Low
Low
Pull-Down
Pull-Down
Low
Pull-Down
Low
Pull-Down
Low
Pull-Down
1st time
power-up
state
Out Low
Low
In
Hi
Hi
Hi
Hi
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Low
Low
Low
Low
IN
Low
Low
Low
power-down
state
Out Low
Selectable
Selectable
Pull-Down
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Pull-Down
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Selectable
Low
Low
Pull-Down
Selectable
Low
Pull-Down
Low
Pull-Down
Low
Pull-Down
Low
Low
Low
1998 May 13
18
|
▷ |