BUK6C3R3-75C_15 Datasheet, PDF (2/13 Pages) NXP Semiconductors – N-channel TrenchMOS intermediate level FET

NXP Semiconductors
BUK6C3R3-75C
N-channel TrenchMOS intermediate level FET
Table 1. Quick reference data …continued
Symbol
Parameter
Conditions
Dynamic characteristics
Q_GD
gate-drain charge
I_D = 25 A; V_DS = 60 V;
V_GS = 10 V; see Figure 13;
see Figure 14
Avalanche ruggedness
E_DS(AL)S
non-repetitive
I_D = 120 A; V_sup < 75 V;
drain-source avalanche R_GS = 50 Ω; V_GS = 10 V;
energy
T_j(init) = 25 °C; unclamped
Min Typ Max Unit
-
76 -
nC
-
-
560 mJ
2. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
mb
Pinning information
Symbol Description
G
gate
S
source
S
source
D
drain^[1]
S
source
S
source
S
source
D
mounting base;
connected to drain
Simplified outline
mb
4
123 567
SOT427 (D2PAK)
[1] It is not possible to connect to pin 4 of the SOT427 package.
3. Ordering information
Graphic symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
BUK6C3R3-75C
D2PAK
Description
Version
plastic single-ended surface-mounted package (D2PAK); 7 leads SOT427
(one lead cropped)
BUK6C3R3-75C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
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