74HC2G00 Datasheet, PDF (2/16 Pages) NXP Semiconductors – Dual 2-input NAND gate

Philips Semiconductors
Dual 2-input NAND gate
Product specification
74HC2G00; 74HCT2G00
FEATURES
• Wide supply voltage range from 2.0 to 6.0 V
• Symmetrical output impedance
• High noise immunity
• Low power dissipation
• Balanced propagation delays
• Very small 8 pins package
• Output capability is standard
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
DESCRIPTION
The 74HC2G/HCT2G00 is a high-speed Si-gate CMOS
device.
The 74HC2G/HCT2G00 provides the 2-input NAND
function.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f ≤ 6.0 ns.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
HC2G00 HCT2G00
UNIT
t_PHL/t_PLH propagation delay nA, nB to nY
C_L = 50 pF; V_CC = 4.5 V 9
12
ns
C_I
input capacitance
1.5
1.5
pF
C_PD
power dissipation capacitance per gate notes 1 and 2
10
10
pF
Notes
1. C_PD is used to determine the dynamic power dissipation (P_D in µW).
P_D = C_PD × V_CC2 × f_i × N + ∑ (C_L × V_CC2 × f_o) where:
f_i = input frequency in MHz;
f_o = output frequency in MHz;
C_L = output load capacitance in pF;
N = total load switching outputs;
V_CC = supply voltage in Volts;
∑ (C_L × V_CC2 × f_o) = sum of outputs.
2. For 74HC2G00 the condition is V_I = GND to V_CC.
For 74HCT2G00 the condition is V_I = GND to V_CC − 1.5 V.
2003 Feb 12
2