TDA4858 Datasheet, PDF (17/44 Pages) NXP Semiconductors – Economy Autosync Deflection Controller (EASDC)

Philips Semiconductors
Economy Autosync Deflection Controller
(EASDC)
Product specification
TDA4858
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Vertical oscillator (oscillator frequency in application without adjustment of free-running frequency f_v(o))
f_V
free-running frequency
R_VREF = 22 kΩ;
40
42
43.3 Hz
C_VCAP = 100 nF
f_v(o)
vertical frequency catching
constant amplitude;
50
−
110
Hz
range
notes 6, 7 and 8
V_VREF
voltage at reference input for
vertical oscillator
−
3.0
−
V
t_d(scan)
delay between trigger pulse
and start of ramp at VCAP
(pin 24) (width of vertical
blanking pulse)
240
300
360
µs
I_VAGC
control currents of amplitude
control
±120 ±200 ±300 µA
C_VAGC
external capacitor at VAGC
(pin 22)
−
−
150
nF
Differential vertical current outputs
ADJUSTMENT OF VERTICAL SIZE (see Figs 3 to 8) [VAMP (PIN 18)]
∆VAMP
vertical size adjustment range I_VAMP = 0; note 9
−
60
−
%
(referenced to nominal vertical _{IVAMP = −135 µA; note 9 −}
100
−
%
size)
I_VAMP
input current for maximum
amplitude (100%)
−110 −120 −135 µA
input current for minimum
amplitude (60%)
−
0
−
µA
V_ref(VAMP)
reference voltage at input
−
5.0
−
V
ADJUSTMENT OF VERTICAL SHIFT (see Figs 3 to 8) [VPOS (PIN 17)]
∆VPOS
vertical shift adjustment range I_VPOS = −135 µA; note 9 −
−11.5 −
%
(referenced to 100% vertical
size)
I_VPOS = 0; note 9
−
+11.5 −
%
I_VPOS
input current for maximum
shift-up
−110 −120 −135 µA
input current for maximum
shift-down
−
0
−
µA
V_ref(VPOS)
V_off(VPOS)
reference voltage at input
vertical shift is centred if VPOS
(pin 17) is forced to ground
−
5.0
−
V
0
−
0.1
V
1997 Oct 27
17