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TDA4858 Datasheet, PDF (13/44 Pages) NXP Semiconductors – Economy Autosync Deflection Controller (EASDC) | |||
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Philips Semiconductors
Economy Autosync Deï¬ection Controller
(EASDC)
Product speciï¬cation
TDA4858
CHARACTERISTICS
VCC = 12 V; Tamb = 25 °C; peripheral components in accordance with Fig.1; unless otherwise speciï¬ed.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Horizontal sync separator
INPUT CHARACTERISTICS FOR DC-COUPLED TTL SIGNALS [HSYNC (PIN 15)]
VDC(HSYNC)
sync input signal voltage
slicing voltage level
1.7
â
â
V
1.2
1.4
1.6
V
tr(HSYNC)
tf(HSYNC)
tW(HSYNC)
IDC(HSYNC)
rise time of sync pulse
fall time of sync pulse
minimum width of sync pulse
input current
VHSYNC = 0.8 V
VHSYNC = 5.5 V
10
â
10
â
0.7
â
â
â
â
â
500
ns
500
ns
â
µs
â200 µA
10
µA
INPUT CHARACTERISTICS FOR AC-COUPLED VIDEO SIGNALS (SYNC-ON-VIDEO, NEGATIVE SYNC POLARITY)
VAC(HSYNC)
sync amplitude of video input
signal voltage
â
300
â
mV
slicing voltage level
source resistance
90
(measured from top sync)
RS = 50 â¦
Vclamp(HSYNC)
top sync clamping voltage level
1.1
IC(HSYNC)
charge current for coupling
capacitor
VHSYNC > Vclamp(HSYNC)
1.7
120
150
mV
1.28 1.5
V
2.4
3.4
µA
tHSYNC(min)
RS(max)
rdiff(HSYNC)
minimum width of sync pulse
maximum source resistance
differential input resistance
duty factor = 7%
during sync
0.7
â
â
â
â
80
â
µs
1500 â¦
â
â¦
Automatic polarity correction for horizontal sync
t--P---t--(H-H----)-
horizontal sync pulse width
related to tH
fH < 45 kHz
fH > 45 kHz
â
â
20
%
â
â
25
%
tP(H)
delay time for changing polarity
0.3
â
1.8
ms
Vertical sync integrator
tint(V)
integration time for generation
of a vertical trigger pulse
fH = 31.45 kHz;
IHREF = 1.052 mA
fH = 64 kHz;
IHREF = 2.141 mA
fH = 100 kHz;
IHREF = 3.345 mA
7
10
13
µs
3.9
5.7
6.5
µs
2.5
3.8
4.5
µs
Vertical sync slicer (DC-coupled, TTL compatible) [VSYNC (pin 14)]
VVSYNC
sync input signal voltage
slicing voltage level
1.7
â
â
V
1.2
1.4
1.6
V
IVSYNC
input current
0 V < VSYNC < 5.5 V
â
â
±10
µA
1997 Oct 27
13
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