XA-H3 Datasheet, PDF (14/36 Pages) NXP Semiconductors – CMOS 16-bit highly integrated microcontroller

Philips Semiconductors
CMOS 16-bit highly integrated microcontroller
Preliminary specification
XA-H3
MMR Name
UART3 Write Register 0
UART3 Write Register 1
UART3 Write Register 2
UART3 Write Register 3
UART3 Write Register 4
UART3 Write Register 5
Reserved – do not write
Reserved – do not write
UART3 Write Register 8
UART3 Write Register 9
UART3 Write Register 10
UART3 Write Register 11
UART3 Write Register 12
UART3 Write Register 13
UART3 Write Register 14
UART3 Write Register 15
Reserved – do not write
Reserved – do not write
UART3 Read Register 0
UART3 Read Register 1
Reserved – do not write
UART3 Read Register 3
Reserved – do not write
Reserved – do not write
UART3 Read Register 8
Reserved – do not write
UART3 Read Register 10
Reserved – do not write
DMA Control Register Ch.0 Rx
FIFO Control & Status Reg Ch.0 Rx
Segment Register Ch.0 Rx
Buffer Base Register Ch.0 Rx
Buffer Bound Register Ch.0 Rx
Address Pointer Reg Ch.0 Rx
Byte Count Register Ch.0 Rx
Data FIFO Register Ch.0 Lo Rx
Data FIFO Register Ch.0 Hi Rx
DMA Control Register Ch.1 Rx
FIFO Control & Status Register Ch.1 Rx
Segment Register Ch. 1 Rx
Read/Write or
Read Only
Size
Address
Offset
Description
Reset
Value
UART3 Registers
R/W
8
8C0h Command register
00h
R/W
8
8C2h Tx/Rx Interrupt & data transfer mode
xx
R/W
8
8C4h Extended Features Control
xx
R/W
8
8C6h Receive Parameter and Control
00h
R/W
8
8C8h Tx/Rx miscellaneous parameters & mode
00h
R/W
8
8CAh Tx. parameter and control
00h
8
8CCh Reserved – do not write
00h
8
8CEh Reserved – do not write
xx
R/W
8
8D0h Transmit Data Buffer
xx
R/W
8
8D2h Master Interrupt control
xx
R/W
8
8D4h Miscellaneous Tx/Rx control register
00h
R/W
8
8D6h Clock Mode Control
xx
R/W
8
8D8h Lower Byte of Baud rate time constant
00h
R/W
8
8DAh Upper Byte of Baud rate time constant
00h
R/W
8
8DCh Miscellaneous Control bits
xx
R/W
8
8DEh External / Status interrupt control
f8h
8
8E8h Reserved – do not write
00h
8
8EAh Reserved – do not write
00h
RO
8
8E0h Tx/Rx buffer and external status
RO
8
8E2h Receive condition status
8E4h
RO
8
8E6h Interrupt Pending Bits
8
8ECh Reserved – do not write
8
8EEh Reserved – do not write
RO
8
8F0h Receive Buffer
8F2h
–
RO
8
8F4h Clock status
8F6-8FEh
Rx DMA Registers
R/W
8
100h Control Register
00h
R/W
8
101h Control & Status Register
00h
R/W
8
102h Points to 64 k data segment
00h
R/W
8
104h Wrap Reload Value for A15 – A8, A7 – A0
00h
reloaded to zero by hardware
R/W
16
106h Upper Bound (plus 1) on A15 – A0
0000h
R/W
16
108h Current Address pointer A15 – A0
0000h
R/W
16
10Ah Corresponds to A15 – A0 Byte Count, generates 0000h
interrupt if enabled and byte count exceeded.
R/W
16
10Ch
10Ch = Byte 0 = older,
00h
10Dh = Byte 1 = younger
00h
R/W
16
10Eh
10Eh = Byte 2 = older,
00h
10Fh = Byte 3 = younger
00h
R/W
8
110h Control Register
00h
R/W
8
111h
Control & Status Register
00h
R/W
8
112h Points to 64 k data segment
00h
1999 Sep 24
14