74F821 Datasheet, PDF (11/18 Pages) NXP Semiconductors – Bus interface registers

Philips Semiconductors
Bus interface registers
Product specification
74F821/822/823/824/825/826
AC ELECTRICAL CHARACTERISTICS FOR 74F821/74F822/74F824/74F825/74F826
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T_amb = +25°C
V_CC = +5.0V
C_L = 50pF, R_L = 500Ω
MIN TYP MAX
T_amb = 0°C to +70°C
V_CC = +5.0V ± 10%
C_L = 50pF, R_L = 500Ω
MIN
MAX
f_max
Maximum clock frequency
Waveform 1 150 180
140
t_PLH
Propagation delay
t_PHL
CP to Qn or Qn
74F821,
74F825, 74F826
Waveform 1
4.0 6.5 8.5
4.0 6.0 8.5
4.0
3.5
t_PLH
Propagation delay
t_PHL
CP to Qn
74F822, 74F824 Waveform 1
4.5 6.5 9.0
4.5 6.5 9.0
4.5
4.5
t_PHL
Propagation delay
MR to Qn or Qn
74F824
74F825, 74F826
Waveform 2
3.0 5.0 8.0
3.0
9.5
9.0
10.0
9.0
8.0
t_PZH
t_PZL
t_PHZ
t_PLZ
Output enable time
OEn to Qn or Qn
Output disable time
OEn to Qn or Qn
Waveform 4
2.0 4.5 8.0
2.0
9.0
Waveform 5
3.0 5.0 8.0
2.5
9.0
Waveform 4
1.5 3.5 6.5
1.5
7.5
Waveform 5
1.5 3.5 6.5
1.5
7.5
UNIT
ns
ns
ns
ns
ns
ns
AC SETUP REQUIREMENTS FOR 74F821/74F822/74F824/74F825/74F826
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T_amb = +25°C
V_CC = +5.0V
C_L = 50pF, R_L = 500Ω
MIN TYP MAX
T_amb = 0°C to +70°C
V_CC = +5.0V ± 10%
C_L = 50pF, R_L = 500Ω
MIN
MAX
t_su (H)
t_su (L)
Setup time, high or low
Dn to CP
Waveform 3
1.0
1.0
1.0
1.0
t_h (H)
t_h (L)
Hold time, high or low
Dn to CP
Waveform 3
2.0
2.0
2.0
2.0
t_w (H)
t_w (L)
CP Pulse width,
high or low
Waveform 1
3.5
3.5
4.0
4.0
t_su (H)
t_su (L)
Setup time, high or low,
CE to CP
Waveform 3
0.0
2.0
0.0
2.0
t_h (H)
t_h (L)
Hold time, high or low
CE to CP
74F824, 74F825, _{Waveform 3}
74F826
0.0
3.0
0.0
3.5
t_w (L)
MR Pulse width, low
Waveform 2
4.5
4.5
t_rec
Recovery time, MR to CP
Waveform 2
2.5
2.5
UNIT
ns
ns
ns
ns
ns
ns
ns
1996 Jan 05
11